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1994

12. Functional Test Program Generation for Digital Systems (R.Ubar,J.Dushina, H.Krupnova, S.Storozhev, V.Zaugarov). Proc. of the 6. Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", Vaals (Niederlande), March 6-8, pp. 14-18, 1994.

13. Test Generation for Digital Systems Based on Alternative Graphs Theory. (R.Ubar). Lecture Notes in Computer Science No 852. Dependable Computing - EDCC-1. Springer-Verlag, 1994, pp.151-164.

14. Parallel Critical Path Tracing Fault Simulation (R. Ubar). Proc. of the 39. Int. Wiss. Kolloquium. Ilmenau (Germany), Sept. 27-30, 1994. Band 1, pp. 399-404.

15. Fault Diagnosis of VLSI Devices Using Alternative Graph Representation (R.Ubar). Proc. of The 8th Symposium on Microcomputer and Microprocessor Applications. Budapest, October 12-14, 1994, Volume I, pp.34-44.

16. A PC-based CAD System for Training Digital Test (R. Ubar, A. Buldas, P. Paomets, J. Raik, V. Tulit). Proc. 5th EUROCHIP Workshop on VLSI Design Training. Dresden, October 17-19, 1994, pp.152-157.

1995

17. Hierarchical Test Generation Based on Alternative Graph Model (R. Ubar). Proc. of 2nd Workshop on Hierarchical Test Generation, Duisburg, 1995.

18. Case Study in Testing Digital Systems. Invited paper (R. Ubar). Baltic Electronics, Vol. 1, No. 1, Sept. 1995, pp.24-27.

19. Fault Diagnosis in Digital Devices (R.Ubar). Proceedings of the Estonian Academy of Sciences, Engineering, 1995, No. 1/1, pp.51-67.

20. Electronics Competence Centre as a Result of European Projects at the Technical University of Tallinn (Ubar). Baltic Electronics, Vol. 1, No. 2, Dec., 1995, pp.9-11.

1996

21. Education Environment for Electronics and Microsystems (M.Ajaots, M.Min, T.Rang, R.Ubar). Proc. of the First European Workshop on Microelectronics Education. Villard de Lans, France, February 5-6, 1996, p.39.

22. Low-Cost CAD Software for Teaching Digital Test (R.Ubar, P.Paomets, J.Raik). Proc. of the First European Workshop on Microelectronics Education. Villard de Lans, France, February 5-6, 1996, p.48.

23. Test Synthesis with Alternative Graphs (R.Ubar). IEEE Design and Test of Computers. Spring, 1996, pp.48-59.

24. Teaching Test and Design for Testability with TURBO-TESTER Software (G.Jervan, A.Markus, P.Paomets, J.Raik, R.Ubar). Proc. of the 3rd Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, May 1996, pp. 589-594.

25. Combining Symbolic Techniques with Topological Approach in Test Generation (R.Ubar). Proc. of the 3rd Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, May 1996, pp. 377-382.

26. Multi-Level Test Generation and Fault Diagnosis for Finite State Machines (R.Ubar, M.Brik). Lecture Notes in Computer Science No 1150. Dependable Computing - EDCC-2. Springer-Verlag, 1996, pp.264-281.

27. Education Environment for Electronics and Microsystems (M.Ajaots, M.Min, T.Rang, R.Ubar). Microelectronics Education. World Sc. Publishing Co.Pte. Ltd. 1996, p.145-148.

28. Low-Cost CAD System for Teaching Digital Test (R.Ubar, P.Paomets, J.Raik). Microelectronics Education. World Scientific Publishing Co. Pte. Ltd. 1996, p.185-188.

29. Electronics Competence Centre and Research in Digital Test at the TTU (R.Ubar). Invited paper. IEEE 14^th NORCHIP Conference, Helsinki, November 4-5, 1996, pp.134-141.

1997

30. A New Approach to Build a Low-Level Malicious Fault List Starting from High-Level Description and Alternative Graphs (A. Benso, P.Prinetto, M.Rebaudengo, M.Sonza, R.Ubar). Proc. IEEE European Design & Test Conference, Paris, March 17-20, 1997

2.3. Muud teaduslikud publikatsioonid

31. Book review (R.Ubar). Boundary-Scan Test. By H.Bleeker, P.Van Den Eijnden and F.De Jong. Kluwer Academic, Boston (1993). 225 pp. In Engineering applications of Artificial Intelligence. Pergamon Press Ltd. 1994.

32. Alternative Graphs as a Mathematical Tool and Knowledge Representation for Diagnosis Purposes in Digital Systems (R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.

33. Constraints Analysis in Hierarchical Test Generation for Digital Systems (H. Krupnova, R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.

34. Hierarchical Test Generation for Finite State Machines (M. Brik, R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.

35. A CAD System for Teaching Digital Test (J. Raik, P. Paomets, E. Ivask, R. Ubar). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.

36. Electronics Competence Centre at the Tallinn Technical University. (R.Ubar, K.Vainomaa). Proc. 4th Biennial Baltic Electronics Conference. Tallinn, October 9-14, 1994.

37. New Curricula and a Competence Centre through TEMPUS at the Technical University of Tallinn (M. Glesner, T. Hollstein, B. Courtois, P. Amblard, R. Ubar, K. Vainomaa). Proc. EC Workshop on Design Methodologies for Microelectronics, Smolenice, 1995, pp. 347-353.

38. Hierarchical Test Synthesis for Digital Systems Using Alternative Graph Model. Dagstuhl-Seminar-Report 132, ISSN 0940-1121. Schloss Dagstuhl, 1995, pp.14-15.

39. Elektroonika kui Eesti innovatsioonisüsteemi infrastrukltuur (M.Min, T.Rang, R.Ubar). Eesti Teadlaste Kongress. Ettekannete kokkuvõtted. Tallinn, 1996, lk.265.

40. Fault Model and Test Synthesis for RISC Processors (R.Ubar, A.Markus, G.Jervan, J.Raik). Baltic Electronics Conference. Proceedings. Tallinn, October 7-11, 1996, pp. 229-232.

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